Decoders

• Definition: n-bit input → 2ⁿ outputs. Only one output asserted per input combination.
• Output i = 1 when input = binary i. All other outputs = 0.
• Example: 3-to-8 decoder: Inputs 12, 11, 10 → Outputs Out0–Out7.
  • Simply converts a binary number to a decimal representation, with the number of outputs depending on the number of bits in the input
• Encoders are the inverse: 2ⁿ inputs → n-bit output.

Multiplexors (Muxes)

• Also called selectors: choose one of several data inputs based on a control/selector signal.
• 2-input Mux:
  • Inputs: A (input 0), B (input 1)
  • Selector: s
  • Output: C = (A AND ¬s) OR (B AND s)
• Gate-level implementation = 2 AND gates + 1 OR gate + inverter.

• n-input Mux:
  • Needs ⌈log₂n⌉ selector signals.
  • Internally: decoder (to generate selection lines) + n AND gates + one OR gate.
• In Verilog: use if for small muxes; case for bigger ones.

Two-Level Logic and PLAs

• Any logic function can be expressed with only AND, OR, NOT.
• Two-level representation:

  • 1st level = AND, 2nd level = OR (+ possible inversion at output).

  • Two main forms:

    • Sum of Products (SOP): OR of AND terms (most common).

    

    • Product of Sums (POS): AND of OR terms.
• How to make SOP from a truth table:
  • Each row where the function = 1 → one AND term (all inputs/complements).
  • OR all those terms together.